Complete Hardware Design Solutions

ASIC Design Services offers design and training services and is a leading distributor for technically complex electronic components and EDA software.

Training Courses

ASIC Design Services in conjunction with Doulos, offers in-depth, hands-on training courses

For more information e-mail or contact Tanya Malherbe Tel: (011) 315 8316

  • Practical Deep Learning
  • Essential Digital Designs Techniques
  • VHDL For Designers
  • Advanced VHDL
  • Comprehensive VHDL
  • Expert VHDL Design
  • Expert VHDL Verification
  • Fast-track Verilog for VHDL users
  • Comprehensive Verilog



Practical Deep Learning

2 - 6 December 2019

Practical Deep Learning w/o Python

3 - 6 December 2019

VHDL for Designers

4 - 6 February 2020     |     23 - 25 June 2020     |     24 - 26 November 2020

Advance VHDL

14 - 15 July 2020

Essential Digital Design Techniques

24 - 25 March 202     |     13 - 14 October 2020

Expert VHDL Design

11 - 12 August 2020

Expert VHDL Verification

15 - 17 September 2020

Fast-track Verilog for VHDL Users

21 - 22 April 2020

Comprehensive Verilog

25 - 29 May 2020

To attend any of the above Courses, please register here

SmartFusion Mixed Signal FPGA Training

Designing with SmartFusion is a 2-day class for FPGA designers, embedded designers and firmware engineers who are designing with Microsemi's SmartFusion mixed signal FPGAs. This course describes the SmartFusion architecture, including the microcontroller subsystem (MSS), analog compute engine (ACE) and FPGA fabric along with software tools and design flows for implementing SmartFusion designs. Hands-on lab exercises targeting the SmartFusion evaluation kit are included to provide practical applications of the material presented.

Click here for further information on the Microsemi SmartFusion training course.

HDL Designer Series

HDL Designer is a complete design and management solution that includes all the point tools of the HDL Designer Series. This course teaches you to use HDL Designer Series effectively in your FPGA or ASIC design process. The lectures take you through the HDL Designer Series design flow. This includes modeling the design with both graphics and text, generating HDL, and then simulating and animating the design to verify behavior. Hands-on lab exercises will reinforce lecture topics and provide you with extensive tool usage experience.

Click here for further information on the HDL Designer training course.


The PADS-PowerPCB class will teach you the workflow of laying out a printed circuit board using the latest version of Mentor Graphics PADS-PowerPCB.

Click here for further information on the PADS-PowerPCB training course.

    PCB Layout Courses

Mentor Graphics offer state-of-the-art PCB solutions which are well suited to addressing your Schematic and PCB Layout requirements.

Mentor Graphics is the longest established EDA (Electronic Design Automation) vendor and the world leader in PCB Layout and simulation software.

ASIC Design Services offer the following Mentor Grpahics Training Courses:

  • DxDesigner for PADS
  • PADS Logic
  • PADS Layout
  • PADS Router
  • DxDesigner for Expedition PCB
  • Expedition Introduction Course
  • Expedition Advanced Course

For more information on training course please visit the Mentor Graphics Website at

Introduction to Boundary Scan Workshops

These full-day sessions are designed to provide design, development, test, and production engineers with a practical hands-on introduction to boundary scan.

Find out how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits.

The workshops outline the following:

  • Overview of the IEEE 1149.x standards
  • Introduction to the XJTAG boundary scan technology
  • How to communicate with the JTAG chain
  • Tools to interact with JTAG devices, such as FPGAs or BGAs
  • Introduction to board testing using the JTAG chain
  • How to describe a circuit in order to enable JTAG testing
  • Fault finding abilities of a JTAG connection test
  • How to test non-JTAG elements of a board design using boundary scan
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